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When the FPGA industry sets about building design tools, it has the logic designer in mind as the main user. Design needs Automated design flow Translation into RTL
Design tools must keep pace with FPGAs, says Xilinx exec
However, with the rapid advances in device functionality, vendors now need to think "out-of-their-box" to enable embedded and DSP designers, as well as the system integrators who tie systems on chips together, to use programmable logic effectively in a variety of new and important applications and markets.
Device vendors are extremely proficient at supporting their silicon with tools, boards, IP and reference designs, and they have built effective partnerships with third-party specialists to ensure a diverse ecosystem.
There is also no doubt that FPGA tools have made great strides in improving synthesis run times, compilation times and place-and-route algorithms.
However, all that can mean very little to embedded software designers, DSP specialists, or system architects not familiar with targeting their designs at FPGAs.
Vendors must provide all the tools and IP needed for specific design domains, not only supporting traditional logic design, but also addressing the methodologies and languages employed in disciplines such as DSP, embedded design and systems-level design.
Vendors must focus on automation of flows and design methodologies that are familiar to this new breed of programmable logic user and not dictate traditional RTL flows.
Logic designers, of course, will always require access to a complete flow for RTL-based design, encompassing all the traditional FPGA tools for advanced floorplanning, in-circuit verification, and incremental implementation.
However, as design teams move from using programmable logic as glue logic to systems on chips, complexity increases. Around 20% of customers doing embedded design are now using more than one processor.
Clearly, there is a need for vendors to provide a more automated design flow that simplifies the generation of such systems and saves customers figuring it out for themselves.
Embedded designers need a methodology that lets them quickly configure a hardware platform, create a custom software design that includes the appropriate libraries, and automate generation of device drivers and a complete board support package.
They also need to be able to create their own custom processing platforms while reducing system cost by consolidating external functions into the FPGA.
Similarly, DSP developers who want to implement complex algorithms in FPGAs need a highly automated flow that bypasses the need to become familiar with hardware description languages.
They should be able to use the DSP design environment early in the overall system-development flow to explore hardware solutions for high-level algorithms or to assemble complete DSP systems for production.
Take, for example, a DSP designer starting with a high-level representation of an algorithm's data flow who is seeking to synthesise their algorithm for optimum implementation in an FPGA.
Traditionally, that DSP designer would have to ask a logic designer to translate their DSP design into an RTL. Today, DSP designers can do it themselves.
They can use the industry standard tools they are accustomed with to develop their algorithms, and then use FPGA vendor tools in a semi-automated manner to translate their DSP design into RTL.
To meet the needs of system architects, FPGA vendors need to provide both system-level and RTL-level tools to allow developers to work across embedded, DSP and RTL disciplines.
At this level, the tools must be sensitive to the need for system designers to integrate different domains to take advantage of the resources available within the FPGA. In practice, this will allow designers to realise one of the major advantages of FPGA-specific system design, which is to optimise system partitioning between functions that are implemented in software and those implemented in hardware.
FPGAs provide flexibility to design and modify on-chip, system-level hardware. To make the most of the opportunities that will arise, FPGA vendors and their partners must invest in creating tools to deliver a more market-oriented, user-friendly design experience.
Tom Feist is senior director of marketing at Xilinx
When the FPGA industry sets about building design tools, it has the logic designer in mind as the main user.
Automated design flow
Translation into RTL